From 8f0e423d0232c839adc8640661f267f56e1af2de Mon Sep 17 00:00:00 2001 From: TinyTapeoutBot <139130078+TinyTapeoutBot@users.noreply.github.com> Date: Sat, 1 Jun 2024 09:42:53 +0300 Subject: [PATCH] feat: update project tt_um_btflv_subleq from BTFLV/tt07-subleq-fram-cpu Commit: ad9a308e65f3787da6c3075e35912264a0051662 Workflow: https://github.com/BTFLV/tt07-subleq-fram-cpu/actions/runs/9328312100 --- projects/tt_um_btflv_subleq/LICENSE | 201 + projects/tt_um_btflv_subleq/commit_id.json | 9 + projects/tt_um_btflv_subleq/docs/info.md | 33 + projects/tt_um_btflv_subleq/info.yaml | 56 + projects/tt_um_btflv_subleq/stats/metrics.csv | 2 + .../stats/synthesis-stats.txt | 78 + .../tt_um_btflv_subleq/tt_um_btflv_subleq.gds | Bin 0 -> 4519344 bytes .../tt_um_btflv_subleq/tt_um_btflv_subleq.lef | 523 + .../tt_um_btflv_subleq.spef | 60530 ++++++++++++++++ .../tt_um_btflv_subleq/tt_um_btflv_subleq.v | 23903 ++++++ 10 files changed, 85335 insertions(+) create mode 100644 projects/tt_um_btflv_subleq/LICENSE create mode 100644 projects/tt_um_btflv_subleq/commit_id.json create mode 100644 projects/tt_um_btflv_subleq/docs/info.md create mode 100644 projects/tt_um_btflv_subleq/info.yaml create mode 100644 projects/tt_um_btflv_subleq/stats/metrics.csv create mode 100644 projects/tt_um_btflv_subleq/stats/synthesis-stats.txt create mode 100644 projects/tt_um_btflv_subleq/tt_um_btflv_subleq.gds create mode 100644 projects/tt_um_btflv_subleq/tt_um_btflv_subleq.lef create mode 100644 projects/tt_um_btflv_subleq/tt_um_btflv_subleq.spef create mode 100644 projects/tt_um_btflv_subleq/tt_um_btflv_subleq.v diff --git a/projects/tt_um_btflv_subleq/LICENSE b/projects/tt_um_btflv_subleq/LICENSE new file mode 100644 index 0000000..261eeb9 --- /dev/null +++ b/projects/tt_um_btflv_subleq/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/projects/tt_um_btflv_subleq/commit_id.json b/projects/tt_um_btflv_subleq/commit_id.json new file mode 100644 index 0000000..8c1f363 --- /dev/null +++ b/projects/tt_um_btflv_subleq/commit_id.json @@ -0,0 +1,9 @@ +{ + "app": "Tiny Tapeout tt07 11b2d371", + "repo": "https://github.com/BTFLV/tt07-subleq-fram-cpu", + "commit": "ad9a308e65f3787da6c3075e35912264a0051662", + "workflow_url": "https://github.com/BTFLV/tt07-subleq-fram-cpu/actions/runs/9328312100", + "sort_id": 1717224168525, + "openlane_version": "OpenLane 337ffbf4749b8bc6e8d8742ed9a595934142198b", + "pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943" +} \ No newline at end of file diff --git a/projects/tt_um_btflv_subleq/docs/info.md b/projects/tt_um_btflv_subleq/docs/info.md new file mode 100644 index 0000000..851a1f3 --- /dev/null +++ b/projects/tt_um_btflv_subleq/docs/info.md @@ -0,0 +1,33 @@ + + +## How it works + +Subleq refers to a kind of OISC where the one instruction is "SUBtract and branch if Less-than or EQual to zero", conventionally abbreviated to subleq. + +Subleq is a simple one instruction language. Each Subleq instruction has 3 memory address operands. Since Subleq has only one instruction, the opcode itself is conventionally omitted, so each instruction is three addresses long. + +You can easily output data in the C Code. Look in the examples how it's done. In Subleq it's implemented like this: +If B is -1 (negative unity), then the number contained in the address given by A is interpreted as a character and written to the machine's output. C is unused. + +The Baud is 115200, when a 10MHz clock is used. + +There is a C Compiler for Subleq. It only supports a typeless simplified subset of C, but most simple things can be done with it. +It is written in C++ and doesn't depend on libraries or external tools. The original website for it is offline, but infos about the compiler still exist on the Esolang Wiki (->Higher Subleq) with a Download Link at the web archive on the bottom of the page. But i will also include the compiler code in the repo. + +## How to test + +Use an Arduino compatible Microcontroller with at least 16KB Memory. Convert the output from the compiler with the given converter to an array, import it to the given Arduino Sketch, flash it and run it. The cpu is designed for 10MHz, but it needs to be tested how fast or slow it can go. The SPI clock is half the input clock. Keep in mind that when changing the clock speed the uart baud will also change. +I will make a kinda userfriendly toolchain and publish it on my github. It will include a Subleq to hex converter (for Quartus etc.), a Subleq to C string converter, an Arduino sketch for flashing to FRAM and example C/Subleq codes. + +## External hardware + +SPI FRAM + +As RAM an 8KB FRAM is used with a 20MHZ SPI interface (MB85RS64V). The advantage of SPI RAM in comparison to SPI Flash is the access time. Every byte can be accessed directly without having bank switching, which leads to different access when randomly accessing data. But in comparison to usual RAM, FRAM is non-volatile. So it has the advantages of Flash and RAM memory (but costs much more). diff --git a/projects/tt_um_btflv_subleq/info.yaml b/projects/tt_um_btflv_subleq/info.yaml new file mode 100644 index 0000000..5656f49 --- /dev/null +++ b/projects/tt_um_btflv_subleq/info.yaml @@ -0,0 +1,56 @@ +# Tiny Tapeout project information +project: + title: "Subleq CPU with FRAM and UART" # Project title + author: "Philip Mohr" # Your name + discord: "philipmohr" # Your discord username, for communication and automatically assigning you a Tapeout role (optional) + description: "Stupid slow Subleq CPU using an external SPI FRAM" # One line description of what your project does + language: "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc + clock_hz: 10000000 # Clock frequency in Hz (or 0 if not applicable) + + # How many tiles your design occupies? A single tile is about 167x108 uM. + tiles: "1x2" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2 + + # Your top module name must start with "tt_um_". Make it unique by including your github username: + top_module: "tt_um_btflv_subleq" + + # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line: + source_files: + - "tt_um_btflv_subleq.v" + - "SPI_FRAM_Interface.v" + - "UART_Credits.v" + - "UART_Transmitter.v" + +# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins. +pinout: + # Inputs + ui[0]: "in_miso" + ui[1]: "" + ui[2]: "" + ui[3]: "" + ui[4]: "" + ui[5]: "" + ui[6]: "" + ui[7]: "" + + # Outputs + uo[0]: "out_mosi" + uo[1]: "out_sck" + uo[2]: "out_cs" + uo[3]: "tx" + uo[4]: "tx_credits" + uo[5]: "" + uo[6]: "" + uo[7]: "" + + # Bidirectional pins + uio[0]: "data_0" + uio[1]: "data_1" + uio[2]: "data_2" + uio[3]: "data_3" + uio[4]: "data_4" + uio[5]: "data_5" + uio[6]: "data_6" + uio[7]: "data_7" + +# Do not change! +yaml_version: 6 diff --git a/projects/tt_um_btflv_subleq/stats/metrics.csv b/projects/tt_um_btflv_subleq/stats/metrics.csv new file mode 100644 index 0000000..a84b5ab --- /dev/null +++ b/projects/tt_um_btflv_subleq/stats/metrics.csv @@ -0,0 +1,2 @@ +design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY +/work/src,tt_um_btflv_subleq,wokwi,flow completed,0h2m14s0ms,0h1m41s0ms,94697.38655021988,0.03634736,47348.69327510994,51.0,56.3701,570.79,1429,0,0,0,0,0,0,0,0,0,0,-1,-1,36882,11193,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,22157813.0,0.0,33.02,37.41,0.97,6.0,-1,1584,2098,86,577,0,0,0,1851,56,23,124,55,416,109,57,94,310,309,13,1485,456,1,692,1721,4355,34255.3536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,55.080,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0 diff --git a/projects/tt_um_btflv_subleq/stats/synthesis-stats.txt b/projects/tt_um_btflv_subleq/stats/synthesis-stats.txt new file mode 100644 index 0000000..34f9a07 --- /dev/null +++ b/projects/tt_um_btflv_subleq/stats/synthesis-stats.txt @@ -0,0 +1,78 @@ + +66. Printing statistics. + +=== tt_um_btflv_subleq === + + Number of wires: 1413 + Number of wire bits: 1448 + Number of public wires: 313 + Number of public wire bits: 348 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1429 + sky130_fd_sc_hd__a2111o_2 4 + sky130_fd_sc_hd__a211o_2 17 + sky130_fd_sc_hd__a211oi_2 1 + sky130_fd_sc_hd__a21bo_2 7 + sky130_fd_sc_hd__a21boi_2 4 + sky130_fd_sc_hd__a21o_2 31 + sky130_fd_sc_hd__a21oi_2 21 + sky130_fd_sc_hd__a221o_2 27 + sky130_fd_sc_hd__a22o_2 46 + sky130_fd_sc_hd__a2bb2o_2 3 + sky130_fd_sc_hd__a311o_2 1 + sky130_fd_sc_hd__a31o_2 25 + sky130_fd_sc_hd__a31oi_2 3 + sky130_fd_sc_hd__a32o_2 13 + sky130_fd_sc_hd__a41o_2 5 + sky130_fd_sc_hd__a41oi_2 1 + sky130_fd_sc_hd__and2_2 79 + sky130_fd_sc_hd__and2b_2 21 + sky130_fd_sc_hd__and3_2 33 + sky130_fd_sc_hd__and3b_2 9 + sky130_fd_sc_hd__and4_2 9 + sky130_fd_sc_hd__and4b_2 3 + sky130_fd_sc_hd__and4bb_2 1 + sky130_fd_sc_hd__buf_1 248 + sky130_fd_sc_hd__buf_2 5 + sky130_fd_sc_hd__conb_1 11 + sky130_fd_sc_hd__dfrtp_2 262 + sky130_fd_sc_hd__dfstp_2 12 + sky130_fd_sc_hd__dfxtp_2 34 + sky130_fd_sc_hd__dlxtn_1 5 + sky130_fd_sc_hd__inv_2 30 + sky130_fd_sc_hd__mux2_2 172 + sky130_fd_sc_hd__nand2_2 37 + sky130_fd_sc_hd__nand2b_2 5 + sky130_fd_sc_hd__nand3_2 3 + sky130_fd_sc_hd__nand3b_2 1 + sky130_fd_sc_hd__nor2_2 57 + sky130_fd_sc_hd__nor2b_2 1 + sky130_fd_sc_hd__nor3_2 2 + sky130_fd_sc_hd__nor4_2 1 + sky130_fd_sc_hd__o2111a_2 3 + sky130_fd_sc_hd__o211a_2 8 + sky130_fd_sc_hd__o211ai_2 1 + sky130_fd_sc_hd__o21a_2 15 + sky130_fd_sc_hd__o21ai_2 14 + sky130_fd_sc_hd__o21ba_2 6 + sky130_fd_sc_hd__o21bai_2 2 + sky130_fd_sc_hd__o221a_2 2 + sky130_fd_sc_hd__o221ai_2 2 + sky130_fd_sc_hd__o22a_2 4 + sky130_fd_sc_hd__o2bb2a_2 1 + sky130_fd_sc_hd__o311a_2 2 + sky130_fd_sc_hd__o31a_2 2 + sky130_fd_sc_hd__o31ai_2 2 + sky130_fd_sc_hd__or2_2 36 + sky130_fd_sc_hd__or2b_2 11 + sky130_fd_sc_hd__or3_2 9 + sky130_fd_sc_hd__or3b_2 9 + sky130_fd_sc_hd__or4_2 19 + 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