Add all wrapper types

EF_SPI.yaml

@@ -15,43 +15,31 @@ info:
     - comm
     - spi
   bus:
-    - APB
+    - generic
   type: soft
   status: verified
   cell_count:
     - IP: N/A
     - APB: N/A
+    - AHBL: N/A
+    - WB: N/A
   width: "0.0"
   height: "0.0"
   technology: n/a
   clock_freq_mhz:
     - IP: N/A
     - APB: N/A
+    - AHBL: N/A
+    - WB: N/A
   digital_supply_voltage: n/a
   analog_supply_voltage: n/a
+
 parameters:
-  - name: DATA_WIDTH
-    default: 16
-    description: The number of bits of data per transaction
-  - name: NUM_PORTS
-    default: 1
-    description: Number of data ports
   - name: CLK_DIVIDER_WIDTH
     default: 8
     description: =Number of bits for the clock divider (used to generate spi clock
       from main clock)
-  - name: SAMPLE_PHASE
-    default: 0
-    description: ""
 ports:
-  - name: clk
-    width: 1
-    direction: input
-    description: 
-  - name: resetb
-    width: 1
-    direction: input
-    description: 
   - name: CPOL
     width: 1
     direction: input
@@ -69,11 +57,11 @@ ports:
     direction: input
     description: 
   - name: datai
-    width: NUM_PORTS*DATA_WIDTH
+    width: 8
     direction: input
     description: 
   - name: datao
-    width: NUM_PORTS*DATA_WIDTH
+    width: 8
     direction: output
     description: 
   - name: busy
@@ -83,32 +71,20 @@ ports:
   - name: done
     width: 1
     direction: output
-    description: 
-  - name: dout
-    width: NUM_PORTS
-    direction: input
-    description: 
-  - name: din
-    width: NUM_PORTS
-    direction: output
-    description: 
-  - name: csb
-    width: 1
-    direction: output
-    description: 
-  - name: sclk
+    description:
+  - name: ss
     width: 1
-    direction: output
-    description: 
+    direction: input
+    description:
 external_interface:
   - name: dout
     port: dout
-    width: NUM_PORTS
+    width: 1
     direction: input
     description: 
   - name: din
     port: din
-    width: NUM_PORTS
+    width: 1
     direction: output
     description: 
   - name: csb
@@ -129,68 +105,67 @@ reset:
 registers:
   - name: DATA
     size: 8
-    mode: w
+    mode: rw
     fifo: no
     offset: 0
     bit_access: no
-    write_port: ""
+    read_port: datao
+    write_port: datai
     description: Data transmitted and received
   - name: CFG
     size: 2
     mode: w
     fifo: no
     offset: 8
     bit_access: no
-    write_port: ""
     description: ""
     fields:
       - name: cpol
         bit_offset: 0
         bit_width: 1
-        write_port: ""
+        write_port: CPOL
         description: "clock polarity"
       - name: cpha
         bit_offset: 1
         bit_width: 1
-        write_port: ""
+        write_port: CPHA
         description: "clock phase"
   - name: STATUS
-    size: 1
+    size: 2
     mode: r
     fifo: no
     offset: 16
     bit_access: no
-    read_port: ""
     description: ""
     fields:
       - name: done 
         bit_offset: 0
         bit_width: 1
-        write_port: ""
+        read_port: done
         description: ""
       - name: busy
         bit_offset: 1
         bit_width: 1
-        write_port: ""
+        read_port: busy
         description: ""
   - name: CTRL
     size: 2
     mode: w
     fifo: no
     offset: 24
     bit_access: no
-    write_port: ""
     description: ""
     fields:
       - name: start
         bit_offset: 0
         bit_width: 1
-        write_port: ""
+        write_port: go
         description: "self clear field"
+        auto_clear: True
       - name: SSn
         bit_offset: 1
         bit_width: 1
-        write_port: ""
+        write_port: ss
         description: ""
   - name: PR
     size: 16
@@ -199,9 +174,9 @@ registers:
     offset: 32
     init: "'h2"
     bit_access: no
-    write_port: ""
+    write_port: clk_divider
     description: SCK PRESCALER should have value >= 2
 flags:
   - name: Done
-    port: Done
+    port: done
     description: transimation is done