Move section headings into section files

content/_app_circuit_designers_etiquette.qmd

@@ -1,3 +1,5 @@
+# Appendix: Circuit Designer's Etiquette {#sec-designers-etiquette}
+
 ## Prolog
 
 A consistent naming and schematic drawing style, as well as VHDL/Verilog coding scheme, is a huge help in avoiding errors and increasing productivity. Even if just one person works on a design, the error rate is lowered. If multiple persons work together in a team, a consistent working style is a big help for smooth cooperation without misunderstanding each other's intentions. Consistency also helps to reuse existing blocks. In a well-done design, the documentation is included in the schematic/source code, so there is no searching for a piece of documentation somewhere else (which is often not found anyway).

content/_app_linux_cheatsheet.qmd

@@ -1,3 +1,5 @@
+# Appendix: Linux Cheatsheet {#sec-linux-cheatsheet}
+
 The most useful commands for the Linux command line are:
 
 - `ls` to list files and directories

content/_app_middlebrook_method.qmd

@@ -1,3 +1,5 @@
+# Appendix: Middlebrook's Method {#sec-middlebrook-method}
+
 When we want to do a closed-loop gain analysis (for stability or other investigations), we have the need to break the loop at one point, apply a stimulus, and monitor the response on the other end. By doing this we want to keep the loading on both ends similar to the original case. To achieve this, we break the loop at one point by inserting (1) an ac voltage source, and (2) attach an ac current source, as shown in @fig-middlebrook-voltage and @fig-middlebrook-current. The derivation of this approach is presented in [@Middlebrook_1975], and has the big advantage that loading is not changed, and the bias points are also correct.
 
 {{< include figures/_fig_middlebrook_voltage.qmd >}}

content/_app_millers_theorem.qmd

@@ -1,3 +1,5 @@
+# Appendix: Miller's Theorem {#sec-miller-theorem}
+
 Using Miller's theorem we can find the equivalent circuit of an impedance connected between two nodes, and we know the transfer function between these nodes. The given situation is shown in @fig-miller-theorem, and the equivalent circuit is shown in @fig-miller-theorem-equivalent.
 
 {{< include figures/_fig_miller_theorem.qmd >}}

content/_app_ngspice_cheatsheet.qmd

@@ -1,3 +1,5 @@
+# Appendix: ngspice Cheatsheet {#sec-ngspice-cheatsheet}
+
 Here is an unsorted list of useful ngspice settings and command:
 
 ## Commands

content/_app_voltage_buffer_zout.qmd

@@ -1,3 +1,5 @@
+# Appendix: 5T-OTA Small-Signal Output Impedance {#sec-5t-ota-zout}
+
 This section gives additional details to the analysis presented in @sec-basic-ota-small-signal.
 Here we provide the full calculation of the output impedance/conductance of the 5T-OTA for frequencies below the dominant pole, i.e. we neglect any capacitors. 
 
@@ -111,4 +113,4 @@ $$
 If we apply $\gm \gg \gds$ again, we arrive at the same result which was used for the noise calculation in @sec-basic-ota-small-signal, compare the expression for $Y'_\mathrm{load}$ given by @eq-basic-ota-output-noise-yload . 
 $$
 i_\mathrm{out} -\left(\gm[12]\right)v_\mathrm{out} \approx 0
-$$
+$$

content/_app_xschem_cheatsheet.qmd

@@ -1,3 +1,5 @@
+# Appendix: Xschem Cheatsheet {#sec-xschem-cheatsheet}
+
 When opening Xschem, using `Help -> Keys` a pop-up windows comes up with many useful shortcuts. The most useful are:
 
 #### Moving around in a schematic:
@@ -41,4 +43,4 @@ When opening Xschem, using `Help -> Keys` a pop-up windows comes up with many us
 - `Shift-o` to toggle light/dark color scheme
 - `s` to run a simulation
 - `a & b` to add cursors to an in-circuit simulation graph
-- `f` full zoom on y- or x-axis in in-circuit simulation graph
+- `f` full zoom on y- or x-axis in in-circuit simulation graph

content/_sec_basic_ota.qmd

@@ -1,3 +1,5 @@
+# A Basic 5-Transistor OTA {#sec-basic-ota}
+
 Suited with the knowledge of basic transistor operation (@sec-first-steps and @sec-gmid-method) and the working knowledge of the current mirror (@sec-mosfet-diode and @sec-current-mirror) as well as the differential pair (@sec-diff-pair) we can now start to design our first real circuit. A fundamental (simple) circuit that is often used for basic tasks is the 5-transistor operational transconductance amplifier (OTA). A circuit diagram of this 5T-OTA is shown in @fig-basic-ota.
 
 {{< include figures/_fig_basic_ota.qmd >}}

content/_sec_cascode_stage.qmd

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+# Cascode Stage {#sec-cascode-stage}
+
 As we have seen in @sec-basic-ota the performance of the OTA is generally quite acceptable (see @tbl-voltage-buffer-spec), but we might want to aim for better output voltage accuracy. As our analysis has shown the output voltage tolerance is limited by the open-loop dc gain $A_0$ of the OTA (see @eq-voltage-buffer-tolerance), which in turn is limited by the output conductance of $M_2$ and $M_4$ in @fig-basic-ota, which is also confirmed by the analytical result in @eq-simple-ota-gain-dc.
 
 During the sizing procedure we have seen that the achievable $\gm / \gds$ ratio of a single MOSFET is limited, even if we increase $L$. We are thus searching for a better option, and here (local) feedback in form of a **cascode** comes to help.

content/_sec_current_mirror.qmd

@@ -1,3 +1,5 @@
+# Current Mirror {#sec-current-mirror}
+
 In this section we will look into a fundamental building block which is often used in integrated circuit design, the **current mirror**. A diagram is shown in @fig-current-mirror with one MOSFET diode converting the incoming bias current into a voltage, and two output MOSFETs working as current sources, which are biased from the diode. By properly selecting all $W$ and $L$ the input current can be scaled, and multiple copies can be created at once. Shown in the figure are two output currents, but any number of parallel branches can be realized.
 
 {{< include figures/_fig_current_mirror.qmd >}}

content/_sec_differential_pair.qmd

@@ -1,3 +1,5 @@
+# Differential Pair {#sec-diff-pair}
+
 Like the current mirror in @sec-current-mirror the **differential pair** is an ubiquitous building block often used in integrated circuit design. The fundamental structure is given in @fig-differential-pair.
 
 {{< include figures/_fig_differential_pair.qmd >}}

content/_sec_first_steps.qmd

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+# First Steps {#sec-first-steps}
+
 In this first chapter we will learn to use Xschem for schematic entry, and how to operate the ngspice SPICE simulator for circuit simulations. Further, we will make ourself familiar with the transistor and other passive components available in the IHP Microelectronics SG13G2 technology. While this is strictly speaking a BiCMOS technology offering MOSFETs as well as SiGe HBTs, we will use it as a pure CMOS technology.
 
 ## The Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) {#sec-mosfet}

content/_sec_improved_ota.qmd

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+# Improved OTA {#sec-improved-ota}
+
 With the new learned know-how of the cascode stage we can set out to improve our original basic 5T-OTA design. Essentially this means to add cascodes to $M_2$ and $M_4$ in @fig-basic-ota. For symmetry reasons we will add cascodes to both sides, and the resulting schematic is shown in @fig-improved-ota.
 
 {{< include figures/_fig_improved_ota.qmd >}}

content/_sec_intro.qmd

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+# Introduction {#sec-intro}
+
 This is the material for an intermediate-level MOSFET circuit design course, held at JKU under course number 336.009 ("KV Analoge Schaltungstechnik").
 
 The course makes heavy use of circuit simulation, using **Xschem** for schematic entry and **ngspice** for simulation. The 130nm CMOS technology **SG13G2** from IHP Microelectronics is used.

content/_sec_mosfet_diode.qmd

@@ -1,3 +1,5 @@
+# First Circuit: MOSFET Diode {#sec-mosfet-diode}
+
 The first (simple) circuit we will investigate is a MOSFET, where the gate is shorted with a drain, a so-called MOSFET "diode", which is shown in @fig-mosfet-diode. This diode is one half of a current mirror, which we will investigate in a future section.
 
 {{< include figures/_fig_mosfet_diode.qmd >}}

content/_sec_sizing.qmd

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+# Transistor Sizing Using gm/ID Methodology {#sec-gmid-method}
+
 When designing integrated circuits it is an important question how to select various parameters of a MOSFET, like $W$, $L$, or the bias current $I_\mathrm{D}$. In comparison to using discrete components in PCB design, or also compared to a bipolar junction transistor (BJT), we have these degrees of freedom, which make integrated circuit design so interesting.
 
 Often, transistor sizing in entry-level courses is based on the square-law model, where a simple analytical equation for the drain current can be derived. However, in nanometer CMOS, the MOSFET behavior is much more complex than these simple models. Also, this highly simplified derivations introduce concepts like the threshold voltage or the overdrive voltage, which are interesting from a theoretical viewpoint, but bear little practical use.

content/_sec_summary.qmd

@@ -1,3 +1,5 @@
+# Summary & Conclusion
+
 By now, you should be familiar with the use of a schematic entry tool (Xschem) and circuit simulator (ngspice). You have learned the basic performance trade-offs, and the large- and small-signal behavior of the MOSFET. You can use the $\gmid$ method to size MOSFET for class-A operation. You can design simple amplifiers based on OTA structures. In summary, you are on a good way to become a good analog or mixed-signal circuit designer!
 
 ::: {.callout-important title="Feedback"}

index.qmd

@@ -21,41 +21,14 @@ copyright:
   year: 2024
 ---
 {{< include content/_macros.qmd >}}
-
-# Introduction {#sec-intro}
-
 {{< include content/_sec_intro.qmd >}}
-
-# First Steps {#sec-first-steps}
-
 {{< include content/_sec_first_steps.qmd >}}
-
-# Transistor Sizing Using gm/ID Methodology {#sec-gmid-method}
-
 {{< include content/_sec_sizing.qmd >}}
-
-# First Circuit: MOSFET Diode {#sec-mosfet-diode}
-
 {{< include content/_sec_mosfet_diode.qmd >}}
-
-# Current Mirror {#sec-current-mirror}
-
 {{< include content/_sec_current_mirror.qmd >}}
-
-# Differential Pair {#sec-diff-pair}
-
 {{< include content/_sec_differential_pair.qmd >}}
-
-# A Basic 5-Transistor OTA {#sec-basic-ota}
-
 {{< include content/_sec_basic_ota.qmd >}}
-
-# Cascode Stage {#sec-cascode-stage}
-
 {{< include content/_sec_cascode_stage.qmd >}}
-
-# Improved OTA {#sec-improved-ota}
-
 {{< include content/_sec_improved_ota.qmd >}}
 
 # A Fully-Differential OTA
@@ -70,34 +43,11 @@ To be added in a future release.
 
 To be added in a future release.
 
-# Summary & Conclusion
-
 {{< include content/_sec_summary.qmd >}}
-
-# Appendix: Middlebrook's Method {#sec-middlebrook-method}
-
 {{< include content/_app_middlebrook_method.qmd >}}
-
-# Appendix: Miller's Theorem {#sec-miller-theorem}
-
 {{< include content/_app_millers_theorem.qmd >}}
-
-# Appendix: 5T-OTA Small-Signal Output Impedance {#sec-5t-ota-zout}
-
 {{< include content/_app_voltage_buffer_zout.qmd >}}
-
-# Appendix: Linux Cheatsheet {#sec-linux-cheatsheet}
-
 {{< include content/_app_linux_cheatsheet.qmd >}}
-
-# Appendix: Xschem Cheatsheet {#sec-xschem-cheatsheet}
-
 {{< include content/_app_xschem_cheatsheet.qmd >}}
-
-# Appendix: ngspice Cheatsheet {#sec-ngspice-cheatsheet}
-
 {{< include content/_app_ngspice_cheatsheet.qmd >}}
-
-# Appendix: Circuit Designer's Etiquette {#sec-designers-etiquette}
-
 {{< include content/_app_circuit_designers_etiquette.qmd >}}